Programme
Wednesday, 23rd March |
|
| 10:00 |
Reception - tea and Coffee
|
| 10:45 |
Conference Welcome & Opening
|
| 11:00 |
Plenary #1
Reconfigurable Computing for High Performance Networking App
|
| 12:00 |
Session 1:
Reconfigurable Accelerators I
Chair: Andreas Koch
|
|
A Reconfigurable Audio Beamforming Multi-Core Processor
A Regular Expression Matching Circuit Based on a Decomposed Automaton
Design and Implementation of a Multi-Core Crypto-Processor for Software Defi
|
|
| 13:30 |
Lunch
|
| 14:30 |
Session 2:
Design Tools
Chair: George Constantinides
|
|
Application Specific Memory Access, Reuse and Reordering for SDRAM
Automatic Generation of FPGA-Specific Pipelined Accelerators
HLS Tools for FPGA : faster development with better performances
|
|
| 16:00 |
Poster 1
|
|
A (Fault-Tolerant)^2 Scheduler for Real-Time Hardware Tasks
A Compact Gaussian Random Number Generator for Small Word Lengths
Accurate Floating Point Arithmetic Through Hardware Error-Free Transformations
Active Storage Networks for Accelerating K-Means Data Clustering
An FPGA Implementation for Texture Analysis Considering the Real-Time Requirements of Vision-based Systems
CReAMS: An Embedded System Platform
Dataflow Graph Partitioning for Optimal Spatio-Temporal Computation on a Coarse Grain Reconfigurable Architecture
|
|
| 17:00 |
Session 3:
Reconfigurable Processors
Chair: Gordon Brebner
|
|
A Pipeline Interleaved Heterogeneous SIMD Soft Processor Array Architecture for MIMO-OFDM Detection
Design, Implementation, and Verification of an Adaptable Processor in Lava HDL
Towards an Adaptable Multiple-ISA Reconfigurable Processor
|
|
| 18:30 |
Finish
|
| 19:30 |
Visit to Sonics Arts Research Centre
|
Thursday, 24th March |
|
| 10:00 |
Session 4a
Applications
Chair: Darin Gillis
|
|
FPGA-based Cherenkov Ring Recognition in Nuclear and Particle Physics Experiments
FPGA-based Smith-Waterman Algorithm: Analysis and Novel Design
|
|
| 11:00 |
Tea/Coffee
|
| 11:30 |
Session 4b
Applications
Chair: Darin Gillis
|
|
Index to Constant Weight Codeword Converter
On-chip ego-motion estimation based on optical flow
|
|
| 12:30 |
Lunch
|
| 13:30 |
Session 5:
Device Architecture
Chair: Tsutomu Sasao
|
|
Comparison Between Heterogeneous Mesh-based and Tree-based Application Specific FPGA
Dynamic VDD Switching Technique and Mapping Optimization in Dynamically Reconfigurable Processor for Efficient Energy Reduction
MEMS interleaving read operation of a holographic memory for optically reconfigurable gate arrays
|
|
| 15:00 |
Poster 2
|
|
FaRM: Fast Recon figuration Manager for Reducing Reconfi guration Time Overhead on FPGA
Feasibility Analysis of Reconfigurable Computing in Low-Power Wireless Sensor Applications
Hierarchical Optical Flow Estimation Architecture using Color Cues
Magnetic Look-Up Table (MLUT) featuring Radiation Hardness, High Performance and Low Power
Reconfigurable Stream-Processing Architecture for Sparse Linear Solvers
The Krawczyk Algorithm: Rigorous bounds for Linear Equation Solution on an FPGA
A Dynamic Reconfigurable CPLD Architecture for Structured ASIC Technology
|
|
| 16:00 |
Session 6:
Reconfigurable Accelerators II
Chair: Roger Woods
|
|
FPGA Accelerated Parallel Sparse Matrix Factorization for Circuit Simulations
FPGA Optimizations for a Pipelined Floating-Point Exponential Unit
NetStage/DPR: A Self-Adaptable FPGA Platform for Application-Level Network Security
|
|
| 17:30 |
Finish
|
| 19:30 |
Dinner, Great Hall, Queen's University Belfast
|
Friday, 25th March |
|
| 09:00 |
Plenary #2
Biologically-Inspired Massively-Parallel...
|
| 10:00 |
Session 7:
Methodology and Simulation
Chair: Peter Athanas
|
|
A Correlation Power Analysis attack against Tate pairing on FPGA
From Plasma to BeeFarm: Design Experience of an FPGA-based Multicore Prototype
|
|
| 11:00 |
Tea/Coffee
|
| 11:30 |
Session 8:
System Architecture
Chair: John McAllister
|
|
Architectural Support for Multithreading on Reconfigurable Hardware
High Performance Programmable FPGA overlay for Digital Signal Processing
Secure Virtualization within a Multi-Processor Soft-Core System-on-Chip Architecture
|
|
| 13:00 |
Conference close
|
| 13:15 |
Lunch
|
&nbps;